IDT82V2051EPPG中文資料IDT數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The IDT82V2051E is a single channel E1 Line Interface Unit. The IDT82V2051E performs clock/data recovery, AMI/HDB3 line decoding and detects and reports the LOS conditions. An integrated Adaptive Equalizer is available to increase the receive sensitivity and enable programming of LOS levels. In transmit path, there is an AMI/HDB3 encoder and Waveform Shaper. There is one Jitter Attenuator, which can be placed in either the receive path or the transmit path. TheJitter Attenuator can also be disabled. The IDT82V2051E supports both Single Rail and Dual Rail system interfaces. To facilitate the network maintenance, a PRBS generation/detection circuit is integrated in the chip, and different types of loopbacks can be set according to the applications. Two different kinds of line terminating impedance, 75 ? and 120 ? are selectable. The chip also provides driver shortcircuit protection and internal protection diode. The chip can be controlled by either software or hardware.

The IDT82V2051E can be used in LAN, WAN, Routers, Wireless Base Stations, IADs, IMAs, IMAPs, Gateways, Frame Relay Access Devices, CSU/DSU equipment, etc.

FEATURES

? Single channel E1 short haul line interfaces

? Supports HPS (Hitless Protection Switching) for 1+1 protection without external relays

? Single 3.3 V power supply with 5 V tolerance on digital interfaces

? Meets or exceeds specifications in

- ANSI T1.102

- ITU I.431, G.703, G.736, G.775 and G.823

- ETSI 300-166, 300-233 and TBR12/13

? Software programmable or hardware selectable on:

- Wave-shaping templates

- Line terminating impedance (75 ?/120 ?)

- Adjustment of arbitrary pulse shape

- JA (Jitter Attenuator) position (receive path or transmit path)

- Single rail/dual rail system interfaces

- HDB3/AMI line encoding/decoding

- Active edge of transmit clock (TCLK) and receive clock (RCLK)

- Active level of transmit data (TDATA) and receive data (RDATA)

- Receiver or transmitter power down

- High impedance setting for line drivers

- PRBS (Pseudo Random Bit Sequence) generation and detection with 215-1 PRBS polynomials

- 16-bit BPV (Bipolar Pulse Violation) /Excess Zero/PRBS error counter

- Analog loopback, Digital loopback, Remote loopback

? Short circuit protection and internal protection diode for line drivers

? AIS (Alarm Indication Signal) detection

? Supports serial control interface, Motorola and Intel Multiplexed interfaces and hardware control mode

? Pin compatibe to 82V2081 T1/E1/J1 Long Haul/Short Haul LIU and 82V2041E T1/E1/J1 Short Haul LIU

? Package:

Available in 44-pin TQFP packages

Green package options available