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K4H510838E-TCA2中文資料三星數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
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Features
? Double-data-rate architecture; two data transfers per clock cycle
? Bidirectional data strobe(DQS)
? Four banks operation
? Differential clock inputs(CK and CK)
? DLL aligns DQ and DQS transition with CK transition
? MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
? All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
? Data I/O transactions on both edges of data strobe
? Edge aligned data output, center aligned data input
? LDM,UDM/DM for write masking only
? Auto & Self refresh
? 15.6us refresh interval(4K/64ms refresh)
? Maximum burst refresh cycle : 8
? 66pin TSOP II package
產(chǎn)品屬性
- 型號(hào):
K4H510838E-TCA2
- 制造商:
SAMSUNG
- 制造商全稱:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
SAMSUNG |
2016+ |
TSOP66 |
6523 |
只做原裝正品現(xiàn)貨!或訂貨! |
詢價(jià) | ||
SAMSUNG |
23+ |
FBGA |
5000 |
原裝正品,假一罰十 |
詢價(jià) | ||
HY |
2020+ |
TSOP66 |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢價(jià) | ||
SANSUNG |
24+ |
54STSOP |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | ||
SAMSUNG/三星 |
24+ |
FBGA |
25500 |
授權(quán)代理直銷,原廠原裝現(xiàn)貨,假一罰十,特價(jià)銷售 |
詢價(jià) | ||
SAMSUNG/三星 |
22+ |
FBGA |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢價(jià) | ||
SAMSUNG |
22+ |
TSOP-66 |
8000 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
SAMSUNG/三星 |
09+ |
TSOP-66 |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
SAMSUNG/三星 |
22+ |
FBGA |
18000 |
只做全新原裝,支持BOM配單,假一罰十 |
詢價(jià) | ||
SAMSUNG/三星 |
2021+ |
BGA |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) |