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K4H511638

512Mb C-die DDR SDRAM Specification

SamsungSamsung semiconductor

三星三星半導體

K4H511638A-TCA0

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638A-TCA2

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638A-TCB0

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638A-TLA0

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638A-TLA2

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638A-TLB0

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TC/LA2

512Mb B-die DDR SDRAM Specification

KeyFeatures ?VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 ?VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) ?Fourbanksoperation ?Differentialcl

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TC/LB0

512Mb B-die DDR SDRAM Specification

KeyFeatures ?VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 ?VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) ?Fourbanksoperation ?Differentialcl

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TC/LB3

512Mb B-die DDR SDRAM Specification

KeyFeatures ?VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 ?VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) ?Fourbanksoperation ?Differentialcl

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TC/LCC

512Mb B-die DDR SDRAM Specification

KeyFeatures ?VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 ?VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) ?Fourbanksoperation ?Differentialcl

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TCA0

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TCA2

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TCB0

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TLA0

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TLA2

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-TLB0

128Mb DDR SDRAM

Features ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe(DQS) ?Fourbanksoperation ?Differentialclockinputs(CKandCK) ?DLLalignsDQandDQStransitionwithCKtransition ?MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-UC/LA2

512Mb B-die DDR SDRAM Specification

KeyFeatures ?VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 ?VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) ?Fourbanksoperation ?Differentialcl

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-UC/LB0

512Mb B-die DDR SDRAM Specification

KeyFeatures ?VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 ?VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) ?Fourbanksoperation ?Differentialcl

SamsungSamsung semiconductor

三星三星半導體

K4H511638B-UC/LB3

512Mb B-die DDR SDRAM Specification

KeyFeatures ?VDD:2.5V±0.2V,VDDQ:2.5V±0.2VforDDR266,333 ?VDD:2.6V±0.1V,VDDQ:2.6V±0.1VforDDR400 ?Double-data-ratearchitecture;twodatatransfersperclockcycle ?Bidirectionaldatastrobe[DQS](x4,x8)&[L(U)DQS](x16) ?Fourbanksoperation ?Differentialcl

SamsungSamsung semiconductor

三星三星半導體

詳細參數(shù)

  • 型號:

    K4H511638

  • 制造商:

    SAMSUNG

  • 制造商全稱:

    Samsung semiconductor

  • 功能描述:

    512Mb C-die DDR SDRAM Specification

供應(yīng)商型號品牌批號封裝庫存備注價格
SAM
12+
TSOP
5000
優(yōu)勢
詢價
SAMSUNG
23+
TSOP
18689
詢價
SAMSUN
23+
TSOP
5500
現(xiàn)貨,全新原裝
詢價
SAMSUNG
17+
TSOP
6200
100%原裝正品現(xiàn)貨
詢價
SAMSUNG
12+
TSOP54
100000
全新原裝,公司大量現(xiàn)貨,絕對正品供應(yīng)
詢價
SAMSUNG
2020+
TSOP66
109
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可
詢價
SAMSUNG
22+
TSOP
4650
詢價
SAMSUNG
06+
BGA
3600
全新原裝進口自己庫存優(yōu)勢
詢價
SAMSUNG
24+
TSOP
162
詢價
SAMSUNG
24+
TSOP
6980
原裝現(xiàn)貨,可開13%稅票
詢價
更多K4H511638供應(yīng)商 更新時間2024-11-16 10:12:00