M470T3354CZ0-CLCC中文資料三星數(shù)據(jù)手冊PDF規(guī)格書

Features

? Performance range

? JEDEC standard 1.8V ± 0.1V Power Supply

? VDDQ = 1.8V ± 0.1V

? 200 MHz fCK for 400Mb/sec/pin, 267MHz fCK for 533Mb/sec/pin, 333MHz fCK for 667Mb/sec/pin, 400MHz fCK for 800Mb/sec/pin

? 4 Banks

? Posted CAS

? Programmable CAS Latency: 3, 4, 5

? Programmable Additive Latency: 0, 1 , 2 , 3 and 4

? Write Latency(WL) = Read Latency(RL) -1

? Burst Length: 4 , 8(Interleave/nibble sequential)

? Programmable Sequential / Interleave Burst Mode

? Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)

? Off-Chip Driver(OCD) Impedance Adjustment

? On Die Termination with selectable values(50/75/150 ohms or disable)

? PASR(Partial Array Self Refresh)

? Average Refresh Period 7.8us at lower than a TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C

- support High Temperature Self-Refresh rate enable feature

? Package: 60ball FBGA - 64Mx8 , 84ball FBGA - 32Mx16

? All of Lead-free products are compliant for RoHS