M69KB096AB80DW8中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

Summary description

The M69KB096AB is a 64 Mbit (67,108,864 bit) PSRAM, organized as 4,194,304 Words by 16 bits. It uses a high-speed CMOS DRAM technology implemented using a one transistor-per-cell topology that achieves bigger array sizes. It provides a high-density solution for low-power handheld applications.

The M69KB096AB is supplied by a 1.7 to 1.95V supply voltage range.

Features summary

■ Supply Voltage

– VCC = 1.7 to 1.95V core supply voltage

– VCCQ = 1.7 to 1.95V for I/O buffers

■ User-selectable Operating Modes

– Asynchronous Modes: Random Read, and Write, Page Read

– Synchronous Modes: NOR-Flash, Full Synchronous (Burst Read and Write)

■ Asynchronous Random Read

– Access Time: 70ns

■ Asynchronous Page Read

– Page Size: 4, 8 or 16 Words

– Subsequent Read Within Page: 20ns

■ Burst Read

– Fixed Length (4, 8, 16 or 32 Words) or Continuous

– Maximum Clock Frequency: 104MHz

– Output delay: 7ns at 104MHz

■ Low Power Consumption

– Active Current: < 25mA

– Standby Current: 140μA

– Deep Power-Down Current: < 10μA

■ Low Power Features

– Partial Array Self-Refresh (PASR)

– Deep Power-Down (DPD) Mode

– Automatic Temperature-compensated SelfRefresh

■ Operating Temperature

– –30°C to +85°C