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MC74HC73D

Dual J-K Flip-Flop with Reset

DualJ-KFlip-FlopwithReset High–PerformanceSilicon–GateCMOS TheMC74HC73isidenticalinpinouttotheLS73.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLSTTLoutputs. Eachflipflopisnegative–edgeclockedandhasanactive

MotorolaMotorola, Inc

摩托羅拉加爾文制造公司

74HC73

DualJKflip-flopwithreset;negative-edgetrigger

1.Generaldescription The74HC73isadualnegativeedgetriggeredJKflip-flopwithindividualJ,K,clock(nCP)and reset(nR)inputsandcomplementarynQandnQoutputs.TheJandKinputsmustbestable oneset-uptimepriortotheHIGH-to-LOWclocktransitionforpredictableoperation.(n

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

74HC73

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdevicethatcomplieswithJEDECstandardno.7A.ItispincompatiblewithLow-powerSchottkyTTL(LSTTL).

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74HC73

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection:

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74HC73D

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection:

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74HC73D

DualJKflip-flopwithreset;negative-edgetrigger

1.Generaldescription The74HC73isadualnegativeedgetriggeredJKflip-flopwithindividualJ,K,clock(nCP)and reset(nR)inputsandcomplementarynQandnQoutputs.TheJandKinputsmustbestable oneset-uptimepriortotheHIGH-to-LOWclocktransitionforpredictableoperation.(n

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

74HC73D

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdevicethatcomplieswithJEDECstandardno.7A.ItispincompatiblewithLow-powerSchottkyTTL(LSTTL).

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74HC73DB

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdevicethatcomplieswithJEDECstandardno.7A.ItispincompatiblewithLow-powerSchottkyTTL(LSTTL).

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74HC73DB

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection:

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74HC73N

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection:

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74HC73N

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdevicethatcomplieswithJEDECstandardno.7A.ItispincompatiblewithLow-powerSchottkyTTL(LSTTL).

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74HC73PW

DualJKflip-flopwithreset;negative-edgetrigger

1.Generaldescription The74HC73isadualnegativeedgetriggeredJKflip-flopwithindividualJ,K,clock(nCP)and reset(nR)inputsandcomplementarynQandnQoutputs.TheJandKinputsmustbestable oneset-uptimepriortotheHIGH-to-LOWclocktransitionforpredictableoperation.(n

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

74HC73PW

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdevicethatcomplieswithJEDECstandardno.7A.ItispincompatiblewithLow-powerSchottkyTTL(LSTTL).

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74HC73PW

DualJKflip-flopwithreset;negative-edgetrigger

Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection:

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

CD74HC73

DualJ-KFlip-FlopwithResetNegative-EdgeTrigger

TITexas Instruments

德州儀器美國(guó)德州儀器公司

CD74HC73

DualJ-KFlip-FlopwithResetNegative-EdgeTrigger

TITexas Instruments

德州儀器美國(guó)德州儀器公司

CD74HC73

DualJ-KFlip-FlopwithResetNegative-EdgeTrigger

TITexas Instruments

德州儀器美國(guó)德州儀器公司

CD74HC73

DualJ-KFlip-FlopwithResetNegative-EdgeTrigger

TITexas Instruments

德州儀器美國(guó)德州儀器公司

CD74HC73

DualJ-KFlip-FlopwithResetNegative-EdgeTrigger

TITexas Instruments

德州儀器美國(guó)德州儀器公司

CD74HC73E

DualJ-KFlip-FlopwithResetNegative-EdgeTrigger

TITexas Instruments

德州儀器美國(guó)德州儀器公司

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更多MC74HC73D供應(yīng)商 更新時(shí)間2025-1-7 10:20:00