MCM72PB8ML3.5中文資料摩托羅拉數(shù)據(jù)手冊PDF規(guī)格書

256K x 72 Bit BurstRAM Multichip Module

The 256K x 72 multichip module uses four 4M bit synchronous fast static RAMs designed to provide a burstable, high performance, secondary cache for the PowerPC? and other high performance microprocessors. It is organized as 256K words of 72 bits each. This device integrates input registers, an output register (MCM72PB8ML only), a 2–bit address counter, and high speed SRAM onto a single monolithic circuit for reduced parts count in cache data RAM applications. Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the overall power consumption of the integrated functions for greater reliability.

The multichip module operates from a 3.3 V core power supply and all outputs operate on a separate 2.5 V or 3.3 V power supply. All inputs and outputs are JEDEC standard JESD8–5 compatible.

? 3.3 V + 10, – 5 Core Power Supply, 2.5 V or 3.3 V I/O Supply

? ADSP, ADSC, and ADV Burst Control Pins

? Option for Pipeline or Flow–Through (Speeds Guaranteed When Module is Purchased by Appropriate Part Number)

? Selectable Burst Sequencing Order (Linear/Interleaved)

? Single–Cycle Deselect Timing

? Internally Self–Timed Write Cycle

? Byte Write and Global Write Control

? JEDEC BGA Pin Assignment