N74F2952N中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
N74F2952N規(guī)格書(shū)詳情
DESCRIPTION
The 74F2952 and 74F2953 are 8-bit registered transceivers. Two 8-bit back-to-back registers store data flowing in both directions between two bi-directional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (CPXX) provided that the Clock Enable (CEXX) is Low. The data is then present at the 3-State output buffers, but is only accessible when the Output Enable (OEXX) is Low. Data flow from ‘A’ inputs to ‘B’ outputs is the same as for ‘B’ inputs to ‘A’ outputs.
FEATURES
? 8-bit registered transceivers
? Two 8-bit, back-to-back registers store data moving in both directions between two bidirectional buses
? Separate Clock, Clock Enable and 3-State Enable provided for each register
? 74F2952 non-inverting
? 74F2953 inverting
? AM2952/2953 functional equivalent
? ‘A’ outputs sink 24mA and source 3mA
? ‘B’ outputs sink 64mA and source 15mA
? 300 mil wide 24-pin Slim DIP package
產(chǎn)品屬性
- 型號(hào):
N74F2952N
- 制造商:
PHILIPS
- 制造商全稱(chēng):
NXP Semiconductors
- 功能描述:
Registered transceiver, non-inverting 3-State
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
NXP |
SOP |
699839 |
集團(tuán)化配單-有更多數(shù)量-免費(fèi)送樣-原包裝正品現(xiàn)貨-正規(guī) |
詢(xún)價(jià) | |||
PHILIPS |
23+ |
NA |
1231 |
專(zhuān)做原裝正品,假一罰百! |
詢(xún)價(jià) | ||
PHI |
22+23+ |
DIP-24 |
37679 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢(xún)價(jià) | ||
NXP |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤(pán) 更多數(shù)量 |
詢(xún)價(jià) | ||||
PHILIPS/飛利浦 |
1535+ |
6026 |
詢(xún)價(jià) | ||||
PHI |
24+ |
SMD |
3000 |
公司存貨 |
詢(xún)價(jià) | ||
PHILIPS/飛利浦 |
22+ |
DIP-24 |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢(xún)價(jià) | ||
PHI |
2023+ |
DIP-24 |
50000 |
原裝現(xiàn)貨 |
詢(xún)價(jià) | ||
NXP |
2022+ |
原廠原包裝 |
8600 |
全新原裝 支持表配單 中國(guó)著名電子元器件獨(dú)立分銷(xiāo) |
詢(xún)價(jià) | ||
NXP Semiconductors |
22+ |
NA |
500000 |
萬(wàn)三科技,秉承原裝,購(gòu)芯無(wú)憂(yōu) |
詢(xún)價(jià) |