NAND01GW3B2CZA6E集成電路（IC）的存儲器規(guī)格書PDF中文資料

Features

■ NAND interface

– x8 or x16 bus width

– Multiplexed address/ data

– Pinout compatibility for all densities

■ Supply voltage: 1.8 V/3 V

■ Page size

– x8 device: (2048 + 64 spare) bytes

– x16 device: (1024 + 32 spare) words

■ Block size

– x8 device: (128K + 4K spare) bytes

– x16 device: (64K + 2K spare) words

■ Page read/program

– Random access: 25 μs (max)

– Sequential access: 25 ns (min)

– Page program time: 200 μs (typ)

■ Copy back program mode

■ Cache read mode

■ Fast block erase: 2 ms (typ)

■ Status register

■ Electronic signature

■ Chip enable ‘don’t care’

■ Security features

– OTP area

– Serial number (unique ID)

– Non-volatile protection option

■ Data protection

– Hardware block locking

– Hardware program/erase locked during

power transitions

■ ONFI 1.0 support

– Cache read

– Read signature

– Read

■ Data integrity

– 100,000 program/erase cycles per block

(with ECC)

– 10 years data retention

■ RoHS compliant packages

■ Development tools

– Error correction code models

– Bad blocks management and wear leveling

algorithms

– Hardware simulation models