1. General description

The NXS0108-Q100 is an 8-bit, dual supply translating transceiver with auto direction sensing, that

enables bidirectional voltage level translation. It features two 8-bit input-output ports (An and Bn),

one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A) can be supplied at

any voltage between 1.2 V and 3.6 V and VCC(B) can be supplied at any voltage between 1.65 V

and 5.5 V, making the device suitable for translating between any of the voltage nodes (1.2 V,

1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An and OE are referenced to VCC(A) and pins Bn are referenced

to VCC(B). A LOW level at pin OE causes the outputs to assume a high-impedance OFF-state.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry

disables the output, preventing the damaging backflow current through the device when it is

powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? Wide supply voltage range:

? VCC(A): 1.2 V to 3.6 V and VCC(B): 1.65 V to 5.5 V

? Maximum data rates:

? Push-pull: 110 Mbps

? IOFF circuitry provides partial Power-down mode operation

? Inputs accept voltages up to 5.5 V

? ESD protection:

? HBM JESD22-A114E Class 2 exceeds 2.5 kV for A port

? HBM JESD22-A114E Class 3B exceeds 15 kV for B port

? CDM JESD22-C101E exceeds 1.5 kV

? IEC61000-4-2 contact discharge exceeds 8 kV for B port

? Latch-up performance exceeds 100 mA per JESD 78B Class II

? DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of

solder joints

NXS0108PW-Q100屬于集成電路（IC） > 轉(zhuǎn)換器，電平移位器。安世半導體(中國)有限公司制造生產(chǎn)的NXS0108PW-Q100轉(zhuǎn)換器，電平移位器邏輯轉(zhuǎn)換器或電平移位器 IC 可用于在數(shù)字邏輯設(shè)備之間傳遞信息，這些設(shè)備可在不同/不兼容的供電電壓下工作，或可實現(xiàn)不同的信令方式。例如，可以將需要 5 V 電源的數(shù)字輸出傳感器連接到具有 3.3 V I/O 電源的 FPGA，或者在 CMOS 或 TTL 等單端信令方式與 PECL 或 LVDS 等差分技術(shù)之間進行轉(zhuǎn)換。