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P102-05SC中文資料PLL數(shù)據(jù)手冊(cè)PDF規(guī)格書

P102-05SC
廠商型號(hào)

P102-05SC

功能描述

Low Skew Output Buffer

文件大小

222.99 Kbytes

頁面數(shù)量

6

生產(chǎn)廠商 PhaseLink Corporation
企業(yè)簡(jiǎn)稱

PLL

中文名稱

PhaseLink Corporation官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2025-2-28 17:42:00

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P102-05SC規(guī)格書詳情

DESCRIPTION

The PLL102-05 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOIC package. It has four outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than ±350 ps, the device acts as a zero delay buffer.

FEATURES

? Frequency range 25 ~ 60MHz.

? Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to the outputs (up to 100kHz SST modulation).

? Zero input - output delay.

? Less than 700 ps device - device skew.

? Less than 250 ps skew between outputs.

? Less than 150 ps cycle - cycle jitter.

? Output Enable function tri-state outputs.

? 3.3V operation.

? Available in 8-Pin 150mil SOIC.

產(chǎn)品屬性

  • 型號(hào):

    P102-05SC

  • 制造商:

    PLL

  • 制造商全稱:

    PLL

  • 功能描述:

    Low Skew Output Buffer

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
ST
23+
TO-92
16900
正規(guī)渠道,只有原裝!
詢價(jià)
NIKO/尼克森微
24+
TO-252
786000
全新原裝假一罰十
詢價(jià)
FREESCALE/飛思卡爾
23+
NA/
138
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開增值稅票
詢價(jià)
NXP(恩智浦)
2021+
TEPBGAII-689(31x31)
499
詢價(jià)
FREESCALE
24+
65200
詢價(jià)
FREESCALE/飛思卡爾
2223+
BGA689
26800
只做原裝正品假一賠十為客戶做到零風(fēng)險(xiǎn)
詢價(jià)
ST
TO-92
36900
集團(tuán)化配單-有更多數(shù)量-免費(fèi)送樣-原包裝正品現(xiàn)貨-正規(guī)
詢價(jià)
NXP
22+
689TEPBGA II (31x31)
9000
原廠渠道,現(xiàn)貨配單
詢價(jià)
尼克森NIKOS
19+
()
880000
明嘉萊只做原裝正品現(xiàn)貨
詢價(jià)
FREESCALE/飛思卡爾
22+
BGA689
3785
絕對(duì)原裝公司現(xiàn)貨!
詢價(jià)