首頁(yè)>P2V28S40ATP-7>規(guī)格書詳情
P2V28S40ATP-7中文資料VML數(shù)據(jù)手冊(cè)PDF規(guī)格書
P2V28S40ATP-7規(guī)格書詳情
DESCRIPTION P2V28S20ATP is organized as 4-bank x 8,388,608-word x 4-bit Synchronous DRAM with LVTTL interface and P2V28S30ATP is organized as 4-bank x 4,194,304-word x 8-bit and P2V28S40ATP is organized as 4-bank x 2,097, 152-word x 16-bit. All inputs and outputs are referenced to the rising edge of CLK.
FEATURES
- Single 3.3V ±0.3V power supply
- Max. Clock frequency -7:143MHz/-75:133MHz/-8:100MHz
- Fully synchronous operation referenced to clock rising edge
- 4-bank operation controlled by BA0,BA1(Bank Address)
- /CAS latency- 2/3 (programmable)
- Burst length- 1/2/4/8/FP (programmable)
- Burst type- Sequential and interleave burst (programmable)
- Byte Control- DQML and DQMU (P2V28S40ATP)
- Random column access
- Auto precharge / All bank precharge controlled by A10
- Auto and self refresh
- 4096 refresh cycles /64ms
- LVTTL Interface
- Package
P2V28S20ATP/30ATP/40ATP
400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch
產(chǎn)品屬性
- 型號(hào)：
P2V28S40ATP-7
- 制造商：
VML
- 制造商全稱：
VML
- 功能描述：
128Mb SDRAM Specification
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
MIRA |
24+ |
TSOP-54 |
860000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
MIRA |
TSOP-54 |
90000 |
集團(tuán)化配單-有更多數(shù)量-免費(fèi)送樣-原包裝正品現(xiàn)貨-正規(guī) |
詢價(jià) | |||
MIRA |
23+ |
TSOP |
5000 |
原裝正品,假一罰十 |
詢價(jià) | ||
MIRA |
23+ |
TSOP-54 |
999999 |
原裝正品現(xiàn)貨量大可訂貨 |
詢價(jià) | ||
MIRA |
2020+ |
TSOP-54 |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
MIRA |
22+ |
TSOP |
10000 |
原裝正品優(yōu)勢(shì)現(xiàn)貨供應(yīng) |
詢價(jià) | ||
MIRA |
2021+ |
TSOP |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
MIRA |
22+ |
TSOP |
37107 |
鄭重承諾只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
MIRA |
2022 |
TSOP |
2400 |
原裝現(xiàn)貨 |
詢價(jià) | ||
MIRA |
23+ |
TSOP54 |
1500 |
特價(jià)庫(kù)存 |
詢價(jià) |
