PDSP16330中文資料ZARLINK數(shù)據(jù)手冊PDF規(guī)格書

The PDSP16318 contains two independent 20-bit Adder/Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.

Two PDSP16318s combined with a single PDSP16112A Complex Multiplier provide a complete arithmetic solution for a Radix 2 DIT FFT Butterfly. A new complex Butterfly result can be generated every 100ns allowing 1k complex FTTs to to be executed in 512μs.

FEATURES

■ Full 10MHz Throughout in FFT Applications

■ Four Independent 16-bit I/O Ports

■ 20-bit Addition or Accumulation

■ Fully Compatible with PDSP16112 Complex Multiplier

■ On Chip Shift Structures for Result Scaling

■ Overflow Detection

■ Independent Three-State Outputs and Clock Enables for 2 Port 10MHz Operation

■ 1.4 micron CMOS

■ 500mW Maximum Power Dissipation

■ 100 pin ceramic QFP