Q67101-H5173-A701中文資料西門子數(shù)據(jù)手冊(cè)PDF規(guī)格書

General Description

The SDA 9362 is a highly integrated deflection controller for CTV receivers with doubled line and standard or doubled field frequencies. It controls among others an horizontal driver circuit for a flyback line output stage, a DC coupled vertical sawtooth output stage and an East-West raster correction circuit. All adjustable output parameters are Ι2C Bus controlled. Inputs are HSYNC, VSYNC and the line locked clock CLL.

Features

? Deflection - Protection - 16:9 / 4:3

? Ι2C Bus alignment of all deflection parameters

? All EW-, V- and H-functions (incl. Φ2)

? PW EHT compensation

? PH EHT compensation

? Compensation of H-phase deviation (e.g. caused by white bar)

? Upper/lower EW-corner correction separately adjustable

? V-angle correction: Vertical frequent linear modulation of H-phase

? V-bow correction: Vertical frequent parabolic modulation of H-phase

? Three reduced V-scan modes (75 , 66 , 50 V-size) selectable

? H- and V-blanking time adjustable

? Partial overscan adjustable to hide the cut off control measuring lines in the reduced scan modes

? Stop/start of vertical deflection adjustable to fill out the 16/9 screen with different letterbox formats without annoying overscan

? Dynamic PH EHT-compensation (white bar)

? Self adaptation of V-frequency/number of lines per field between 192 and 680 for each possible line frequency

? Protection against EHT run away (X-rays protection)

? Protection against missing V-deflection (CRT-protection)

? Two digital outputs for general purpose, controlled by Ι2C Bus

? Selectable softstart of the H-output stage

? P-MQFP-44-2 package

? 5 V supply voltage