R19DS0105EJ0105中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

1.1 Features

? High-performance DSP

? Handle PHY layer of power line communication etc.

? Maximum operating frequency: 276MHz

? IRAM: 128KB, DRAM: 128KB

? Dedicated instructions for Viterbi and Reed Solomon processing, AES128 encryption/decryption processing,

and others

? MCU (ARM? Cortex?-M0+)

? Handle protocol conversion processing for the external MCU interface etc.

? Maximum operating frequency: 92MHz

? RAM: 32KB

? CRC Operation H/W Core

? Analog front-end (AFE) circuit

? DAC

? Delta Sigma DA converter

? ENOB:11bit

? Variable Output Amplifiers

? 114dBuVrms output (high output mode, 50-ohm drive for differential terminals)

? Gain variable, in 3dB steps

? Variable Receiving Amplifiers

? Dynamic range: -18dB to +60dB, 2dB steps

? AGC with DSP control

? ADC

? Delta Sigma ADC

? ENOB:10bit

? A variety of External IOs

? UART(1ch), SPIs(1ch), Serial Flash IF(Single/Dual)

? PORT(10ch) (* however, exclusive use with above peripherals)

? Built-in regulator: 3.3V input, 1.15V DC-DC converter

? Supply voltage:3.3V

? PKG:40-pin QFN 6mm x 6mm, 0.5mm pitch?

? Operating temperature

? -40 to+ 85 degrees