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SL4060B中文資料SLS數(shù)據(jù)手冊PDF規(guī)格書

SL4060B
廠商型號

SL4060B

功能描述

14-Stage Ripple-Carry Binary Counter/Divider and Oscillator

文件大小

39.9 Kbytes

頁面數(shù)量

5

生產(chǎn)廠商 System Logic Semiconductor
企業(yè)簡稱

SLS

中文名稱

System Logic Semiconductor官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2024-11-8 20:38:00

SL4060B規(guī)格書詳情

14-Stage Ripple-Carry Binary Counter/Divider and Oscillator High-Voltage Silicon-Gate CMOS

The SL4060B consists of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all-Q’s state and disables the oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of OSC In (and OSC Out). Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times.

? Operating Voltage Range: 3.0 to 18 V

? Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C

? Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

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