SN54LS92

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

SN54LS92

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

SN54LS92

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

SN54LS92

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

SN54LS92

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

SN54LS92J

DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER

TheSN54/74LS90,SN54/74LS92andSN54/74LS93arehigh-speed4-bitrippletypecounterspartitionedintotwosections.Eachcounterhasadivide-by-twosectionandeitheradivide-by-five(LS90),divide-by-six(LS92)ordivide-by-eight(LS93)sectionwhicharetriggeredbyaHIGH-to-LOWtransition

SN54LS92J

DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER

SN54LS92J

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

SN54LS92W

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

54LS92

DIVIDE-BY-TWELVECOUNTER

54LS92DM

DIVIDE-BY-TWELVECOUNTER

DESCRIPTION- The’92isa4-stageripplecountercontainingahighspeedflip-flopactingasadivide-by-twoandthreeflip-flopsconnectedasadivide-by-six.HIGHsignalsontheMasterReset(MR)inputsoverridetheclocksandforcealloutputstotheLOWstate.

54LS92DM

DIVIDE-BY-TWELVECOUNTER

54LS92FM

DIVIDE-BY-TWELVECOUNTER

DESCRIPTION- The’92isa4-stageripplecountercontainingahighspeedflip-flopactingasadivide-by-twoandthreeflip-flopsconnectedasadivide-by-six.HIGHsignalsontheMasterReset(MR)inputsoverridetheclocksandforcealloutputstotheLOWstate.

54LS92FM

DIVIDE-BY-TWELVECOUNTER