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SY100S838

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZC

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZC

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZCTR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZCTR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZI

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZI

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZITR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZITR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZC

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZCTR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZCTR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZI

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZI

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZITR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZITR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838_06

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838L

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZC

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

詳細(xì)參數(shù)

  • 型號:

    SY100S838

  • 功能描述:

    IC CLOCK GEN 3.3V/5V 20-SOIC

  • RoHS:

  • 類別:

    集成電路(IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器

  • 系列:

    Precision Edge®

  • 標(biāo)準(zhǔn)包裝:

    27

  • 類型:

    頻率合成器

  • PLL:

  • 輸入:

    PECL,晶體

  • 輸出:

    PECL

  • 電路數(shù):

    1 比率 -

  • 1:

    1 差分 -

  • 輸出:

    無/是 頻率 -

  • 最大:

    800MHz

  • 除法器/乘法器:

    是/無

  • 電源電壓:

    3.135 V ~ 5.25 V

  • 工作溫度:

    0°C ~ 85°C

  • 安裝類型:

    表面貼裝

  • 封裝/外殼:

    28-SOIC(0.295,7.50mm 寬)

  • 供應(yīng)商設(shè)備封裝:

    28-SOIC

  • 包裝:

    管件

供應(yīng)商型號品牌批號封裝庫存備注價格
MICREL
23+
SOP20
19
原裝環(huán)保房間現(xiàn)貨假一賠十
詢價
MICREL
0733+
SOP20
19
剛到現(xiàn)貨加微13425146986
詢價
MICREL/麥瑞
22+
SOP20
9852
只做原裝正品現(xiàn)貨,或訂貨假一賠十!
詢價
24+
SMD20
6
本站現(xiàn)庫存
詢價
Micrel
23+
20-SOIC
7750
全新原裝優(yōu)勢
詢價
MICREL
2016+
SOP-20
8880
只做原裝,假一罰十,公司可開17%增值稅發(fā)票!
詢價
MICREL
2339+
SOP-20
6232
公司原廠原裝現(xiàn)貨假一罰十!特價出售!強勢庫存!
詢價
SYNERGY
24+
SOP
2568
原裝優(yōu)勢!絕對公司現(xiàn)貨
詢價
Microchip
23+
2017-MI
21500
受權(quán)代理!全新原裝現(xiàn)貨特價熱賣!
詢價
MICREL
23+
NA
2330
專做原裝正品,假一罰百!
詢價
更多SY100S838供應(yīng)商 更新時間2024-12-24 17:10:00