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SY100S838LZC

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZC

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZC

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZC

包裝:管件 封裝/外殼:20-SOIC(0.295",7.50mm 寬) 類別:集成電路(IC) 時(shí)鐘發(fā)生器,PLL,頻率合成器 描述:IC CLOCK GEN 3.3V/5V 20-SOIC

MicrochipMicrochip Technology

微芯科技微芯科技股份有限公司

SY100S838LZCTR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZCTR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZCTR

(?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZG

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZGTR

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZI

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZI

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZI

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZITR

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZITR

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838LZITR

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZC

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZC

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZCTR

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZCTR

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

SY100S838ZCTR

(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP

DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby

MicrelMicrel Semiconductor

麥瑞半導(dǎo)體

產(chǎn)品屬性

  • 產(chǎn)品編號(hào):

    SY100S838LZC

  • 制造商:

    Microchip Technology

  • 類別:

    集成電路(IC) > 時(shí)鐘發(fā)生器,PLL,頻率合成器

  • 系列:

    Precision Edge?

  • 包裝:

    管件

  • 類型:

    時(shí)鐘發(fā)生器

  • PLL:

    無(wú)

  • 輸入:

    ECL,PECL

  • 輸出:

    時(shí)鐘

  • 比率 - 輸入:

    1:4

  • 差分 - 輸入:

    是/是

  • 頻率 - 最大值:

    1GHz

  • 分頻器/倍頻器:

    是/無(wú)

  • 電壓 - 供電:

    3V ~ 3.8V

  • 工作溫度:

    0°C ~ 85°C

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    20-SOIC(0.295",7.50mm 寬)

  • 供應(yīng)商器件封裝:

    20-SOIC

  • 描述:

    IC CLOCK GEN 3.3V/5V 20-SOIC

供應(yīng)商型號(hào)品牌批號(hào)封裝庫(kù)存備注價(jià)格
MICREL
20+
1562
全新現(xiàn)貨熱賣中歡迎查詢
詢價(jià)
Microchip Technology
21+
20-SOIC
56200
一級(jí)代理/放心采購(gòu)
詢價(jià)
Micrel
24+
SOIC-20
28500
授權(quán)代理直銷,原廠原裝現(xiàn)貨,假一罰十,特價(jià)銷售
詢價(jià)
MICROCHIP
20+
SOP-20
1001
就找我吧!--邀您體驗(yàn)愉快問(wèn)購(gòu)元件!
詢價(jià)
Micrel(麥瑞)
23+
NA
20094
正納10年以上分銷經(jīng)驗(yàn)原裝進(jìn)口正品做服務(wù)做口碑有支持
詢價(jià)
微芯/麥瑞
22+
NA
500000
萬(wàn)三科技,秉承原裝,購(gòu)芯無(wú)憂
詢價(jià)
MICREL/麥瑞
23+
SOP-20
50000
全新原裝正品現(xiàn)貨,支持訂貨
詢價(jià)
Microchip
22+
NA
1899
加我QQ或微信咨詢更多詳細(xì)信息,
詢價(jià)
Microchip
22+
20SOIC
9000
原廠渠道,現(xiàn)貨配單
詢價(jià)
MICREL/麥瑞
2022
SOP-20
80000
原裝現(xiàn)貨,OEM渠道,歡迎咨詢
詢價(jià)
更多SY100S838LZC供應(yīng)商 更新時(shí)間2024-12-24 10:00:00