首頁 >SY100S838ZI TR>規(guī)格書列表
零件編號(hào) | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
包裝:管件 封裝/外殼:20-SOIC(0.295",7.50mm 寬) 類別:集成電路(IC) 時(shí)鐘發(fā)生器,PLL,頻率合成器 描述:IC CLOCK GEN 3.3V/5V 20-SOIC | MicrochipMicrochip Technology 微芯科技微芯科技股份有限公司 | Microchip | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel | ||
(?1,?2/3)OR(?2,?4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麥瑞半導(dǎo)體 | Micrel |
產(chǎn)品屬性
- 產(chǎn)品編號(hào):
SY100S838ZI-TR
- 制造商:
Microchip Technology
- 類別:
集成電路(IC) > 時(shí)鐘發(fā)生器,PLL,頻率合成器
- 系列:
Precision Edge?
- 包裝:
管件
- 類型:
時(shí)鐘發(fā)生器
- PLL:
無
- 輸入:
ECL,PECL
- 輸出:
時(shí)鐘
- 比率 - 輸入:
1:4
- 差分 - 輸入:
是/是
- 頻率 - 最大值:
1GHz
- 分頻器/倍頻器:
是/無
- 電壓 - 供電:
4.2V ~ 5.5V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
20-SOIC(0.295",7.50mm 寬)
- 供應(yīng)商器件封裝:
20-SOIC
- 描述:
IC CLOCK GEN 3.3V/5V 20-SOIC
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
Microchip Technology |
24+ |
20-SOIC |
56200 |
一級(jí)代理/放心采購 |
詢價(jià) | ||
MICROCHIP |
20+ |
SOP-20 |
1001 |
就找我吧!--邀您體驗(yàn)愉快問購元件! |
詢價(jià) | ||
微芯/麥瑞 |
22+ |
NA |
500000 |
萬三科技,秉承原裝,購芯無憂 |
詢價(jià) | ||
Microchip |
22+ |
NA |
1899 |
加我QQ或微信咨詢更多詳細(xì)信息, |
詢價(jià) | ||
Microchip Technology |
24+ |
20-SOIC(0.295 7.50mm 寬) |
9350 |
獨(dú)立分銷商 公司只做原裝 誠心經(jīng)營 免費(fèi)試樣正品保證 |
詢價(jià) | ||
SYNERGY |
23+ |
SOP20 |
11200 |
原廠授權(quán)一級(jí)代理、全球訂貨優(yōu)勢渠道、可提供一站式BO |
詢價(jià) | ||
SYNERGY |
24+ |
SMD |
3 |
現(xiàn)貨供應(yīng) |
詢價(jià) | ||
SYNERGY |
22+ |
SMD |
1234 |
⊙⊙新加坡大量現(xiàn)貨庫存,深圳常備現(xiàn)貨!歡迎查詢!⊙ |
詢價(jià) | ||
SYNERGY |
17+ |
SOP |
6200 |
100%原裝正品現(xiàn)貨 |
詢價(jià) | ||
SYNERGY |
24+ |
SOP-20 |
6868 |
原裝現(xiàn)貨,可開13%稅票 |
詢價(jià) |
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