TC55B329J中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

Description

The TC55B329P/J is a 294,912 bit high speed BiCMOS static random access memory organized as 32,768 words by 9 bits and

operated from a single 5V supply. Toshiba's BICMOS technology and advanced circuit design enable high speed operation.

The TC55B329P/J features low power dissipation when the device is deselected using chip enable (CE1, CE2) and has an

output enable input (OE) for fast memory access.

The TC558329P/J is suitable for use in high speed applications such as cache memory and high speed storage. All inputs and

outputs are TTL compatible.

The TC55B329P/J is available in a 300mil width, 32-pin DIP and SOJ suitable for high density surface assembly.

Features

Fast access time

- TC55B329P/J-10

TC55B329P/J-12

? Low power dissipation

170mA (max.)

- Operation:

- TC55B329P/J-10

- TC55B329P/J-12

Standby:

170mA (max.)

15mA (max.)

Single 5V power supply: 5V±10

10ns (max.)

12ns (max.)

Fully static operation

Inputs and outputs TTL compatible

? Output buffer control: O?

? Package:

- TC55B329P: DIP32-P-300

TC55B329J: SOJ32-P-300