V53C832L35中文資料茂矽電子數(shù)據(jù)手冊PDF規(guī)格書

Description

The V53C832L is a high speed 262,144 x 32 bit high performance CMOS dynamic random access memory. The V53C832L offers a combination of unique features including: EDO Page Mode operation for higher sustained bandwidth with Page Mode cycle times as short as 12ns. All inputs are TTL compatible. Input and output capacitance is significantly lowered to increase performance and minimize loading. These features make the V53C832L ideally suited for a wide variety of high performance computer systems and peripheral applications.

Features

■ 256K x 32-bit organization

■ EDO Page Mode for a sustained data rate of 83 MHz

■ RAS access time: 30, 35, 40 ns

■ Four CAS Inputs for Byte Read and Byte Write Control

■ Low power dissipation

■ Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh

■ Refresh Interval: 512 cycles/8 ms

■ Available in 100-pin PQFP and 100-pin LQFP packages

■ Single +3.3V ± 0.3V Power Supply

■ TTL Interface