74ALS377N中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書
74ALS377N規(guī)格書詳情
DESCRIPTION
The 74ALS377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) is Low.
The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.
FEATURES
? Ideal for addressable register applications
? Enable for address and data synchronization applications
? Eight edge-triggered D-type flip-flops
? Buffered common clock
? See 74ALS273 for master reset version
? See 74ALS373 for transparent latch version
? See 74ALS374 for 3-State version
產(chǎn)品屬性
- 型號(hào)：
74ALS377N
- 制造商：
PHILIPS
- 制造商全稱：
NXP Semiconductors
- 功能描述：
Octal D flip-flop with enable
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
TI |
21+ |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | |||
FAIRCHILD |
1815+ |
SOP16-3.9 |
6528 |
只做原裝正品現(xiàn)貨!或訂貨,假一賠十! |
詢價(jià) | ||
FAIRCHILD/仙童 |
22+ |
SOP16-3.9MM |
50000 |
只做原裝正品,假一罰十,歡迎咨詢 |
詢價(jià) | ||
TI |
23+ |
NA |
1486 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
24+ |
5000 |
公司存貨 |
詢價(jià) | ||||
TI/德州儀器 |
23+ |
SOP |
3000 |
一級(jí)代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、 |
詢價(jià) | ||
TI/德州儀器 |
2021+ |
DIP |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
TI |
2023+ |
SOP14 |
8700 |
原裝現(xiàn)貨 |
詢價(jià) | ||
FAIRCHILD |
SOP16-3.9MM |
608900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
TI |
22+ |
5.2 |
2987 |
只售原裝自家現(xiàn)貨!誠(chéng)信經(jīng)營(yíng)!歡迎來(lái)電! |
詢價(jià) |
