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首頁(yè) >74LV10>規(guī)格書列表

零件編號(hào)	下載&訂購(gòu)	功能描述	制造商&上傳企業(yè)	LOGO
74LV10	文件：113.24 Kbytes Page：10 Pages	Triple 3-input NAND gate DESCRIPTION The74LV10isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT10. The74LV10providesthe3-inputNANDfunction. FEATURES ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Typi	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV107	文件：121.49 Kbytes Page：12 Pages	Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The74LV107isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT107. The74LV107isadualnegative-edgetriggeredJK-typeflip-flopfeaturingindividualJ,K,clock(nCP)andreset(nR)inputs;alsocomplementaryQandQoutputs. TheJandK	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV107D	文件：121.49 Kbytes Page：12 Pages	Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The74LV107isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT107. The74LV107isadualnegative-edgetriggeredJK-typeflip-flopfeaturingindividualJ,K,clock(nCP)andreset(nR)inputs;alsocomplementaryQandQoutputs. TheJandK	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV107DB	文件：121.49 Kbytes Page：12 Pages	Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The74LV107isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT107. The74LV107isadualnegative-edgetriggeredJK-typeflip-flopfeaturingindividualJ,K,clock(nCP)andreset(nR)inputs;alsocomplementaryQandQoutputs. TheJandK	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV107N	文件：121.49 Kbytes Page：12 Pages	Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The74LV107isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT107. The74LV107isadualnegative-edgetriggeredJK-typeflip-flopfeaturingindividualJ,K,clock(nCP)andreset(nR)inputs;alsocomplementaryQandQoutputs. TheJandK	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV107PW	文件：121.49 Kbytes Page：12 Pages	Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The74LV107isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT107. The74LV107isadualnegative-edgetriggeredJK-typeflip-flopfeaturingindividualJ,K,clock(nCP)andreset(nR)inputs;alsocomplementaryQandQoutputs. TheJandK	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV107PWDH	文件：121.49 Kbytes Page：12 Pages	Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The74LV107isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT107. The74LV107isadualnegative-edgetriggeredJK-typeflip-flopfeaturingindividualJ,K,clock(nCP)andreset(nR)inputs;alsocomplementaryQandQoutputs. TheJandK	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV109	文件：124.88 Kbytes Page：12 Pages	Dual JK flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LV109isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT109. Schmitt-triggeractionintheclockinputmakesthecircuithighlytoleranttoslowerclockriseandfalltimes. FEATURES ?Optimizedforlowvoltageapplications:1.0to3.6V ?	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV109D	文件：124.88 Kbytes Page：12 Pages	Dual JK flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LV109isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT109. Schmitt-triggeractionintheclockinputmakesthecircuithighlytoleranttoslowerclockriseandfalltimes. FEATURES ?Optimizedforlowvoltageapplications:1.0to3.6V ?	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV109DB	文件：124.88 Kbytes Page：12 Pages	Dual JK flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LV109isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT109. Schmitt-triggeractionintheclockinputmakesthecircuithighlytoleranttoslowerclockriseandfalltimes. FEATURES ?Optimizedforlowvoltageapplications:1.0to3.6V ?	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV109N	文件：124.88 Kbytes Page：12 Pages	Dual JK flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LV109isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT109. Schmitt-triggeractionintheclockinputmakesthecircuithighlytoleranttoslowerclockriseandfalltimes. FEATURES ?Optimizedforlowvoltageapplications:1.0to3.6V ?	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV109PW	文件：124.88 Kbytes Page：12 Pages	Dual JK flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LV109isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT109. Schmitt-triggeractionintheclockinputmakesthecircuithighlytoleranttoslowerclockriseandfalltimes. FEATURES ?Optimizedforlowvoltageapplications:1.0to3.6V ?	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV109PWDH	文件：124.88 Kbytes Page：12 Pages	Dual JK flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LV109isalow-voltageSi-gateCMOSdevicethatispinandfunctioncompatiblewith74HC/HCT109. Schmitt-triggeractionintheclockinputmakesthecircuithighlytoleranttoslowerclockriseandfalltimes. FEATURES ?Optimizedforlowvoltageapplications:1.0to3.6V ?	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV10D	文件：113.24 Kbytes Page：10 Pages	Triple 3-input NAND gate DESCRIPTION The74LV10isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT10. The74LV10providesthe3-inputNANDfunction. FEATURES ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Typi	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV10DB	文件：113.24 Kbytes Page：10 Pages	Triple 3-input NAND gate DESCRIPTION The74LV10isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT10. The74LV10providesthe3-inputNANDfunction. FEATURES ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Typi	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV10N	文件：113.24 Kbytes Page：10 Pages	Triple 3-input NAND gate DESCRIPTION The74LV10isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT10. The74LV10providesthe3-inputNANDfunction. FEATURES ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Typi	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV10PW	文件：113.24 Kbytes Page：10 Pages	Triple 3-input NAND gate DESCRIPTION The74LV10isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT10. The74LV10providesthe3-inputNANDfunction. FEATURES ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Typi	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74LV10PWDH	文件：113.24 Kbytes Page：10 Pages	Triple 3-input NAND gate DESCRIPTION The74LV10isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT10. The74LV10providesthe3-inputNANDfunction. FEATURES ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Typi	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips

詳細(xì)參數(shù)

型號(hào)：
74LV10
制造商：
PHILIPS
制造商全稱：
NXP Semiconductors
功能描述：
Triple 3-input NAND gate

供應(yīng)商	型號(hào)	品牌	批號(hào)	封裝	庫(kù)存	備注	價(jià)格
深圳市歐立現(xiàn)代科技有限公司	74LV10D	ph	24+	N/A	6980	原裝現(xiàn)貨,可開13%稅票	詢價(jià)
深圳市納艾斯科技有限公司	74LV10D	NXP	2020+	SOP14	80000	只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增	詢價(jià)
深圳市航潤(rùn)創(chuàng)能電子集團(tuán)有限公司	74LV10D	NXP	21+	SOP14	28	原裝現(xiàn)貨假一賠十	詢價(jià)
貿(mào)澤芯城（深圳）電子科技有限公司	74LV10A	TI/德州儀器	23+	TSSOP14	4600	原廠授權(quán)代理,海外優(yōu)勢(shì)訂貨渠道?？商峁┐罅繋?kù)存,詳	詢價(jià)
深圳市創(chuàng)新跡電子有限公司	74LV10A	TI/德州儀器	22+	TSSOP14	25000	只做原裝,原裝,假一罰十	詢價(jià)
深圳市安富世紀(jì)電子有限公司	74LV10D	NXP	23+	SOP14	28	全新原裝正品現(xiàn)貨,支持訂貨	詢價(jià)
深圳市星佑電子有限公司	74LV11	PHILIPS	00+	TSSOP14	268	全新原裝100真實(shí)現(xiàn)貨供應(yīng)	詢價(jià)
深圳市福安甌科技有限公司	74LV11	PHILIPS	22+	TSSOP14	307	⊙⊙新加坡大量現(xiàn)貨庫(kù)存,深圳常備現(xiàn)貨!歡迎查詢!⊙	詢價(jià)
深圳市豪邁興電子有限公司	74LV11	PHILIPS	2339+	TSSOP14	25843	公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢(shì)庫(kù)存!	詢價(jià)
深圳市佳鑫美電子科技有限公司	74LV11	PHILIPS	24+	TSSOP14	2987	只售原裝自家現(xiàn)貨!誠(chéng)信經(jīng)營(yíng)!歡迎來電!	詢價(jià)

更多74LV10供應(yīng)商更新時(shí)間2025-1-4 8:40:00

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