首頁(yè) >CY7C1320CV18>規(guī)格書列表
零件編號(hào) | 下載&訂購(gòu) | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
CY7C1320CV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | |
CY7C1320CV18 | 18-Mbit DDR II SRAM 2-Word Burst Architecture | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | |
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture FunctionalDescription TheCY7C1316CV18,CY7C1916CV18,CY7C1318CV18,andCY7C1320CV18are1.8VSynchronousPipelinedSRAMsequippedwithDDR-IIarchitecture.TheDDR-IIconsistsofanSRAMcorewithadvancedsynchronousperipheralcircuitryandaone-bitburstcounter.Addressesforreadandwr | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR II SRAM 2-Word Burst Architecture | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
18-Mbit DDR II SRAM 2-Word Burst Architecture | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress |
詳細(xì)參數(shù)
- 型號(hào):
CY7C1320CV18
- 功能描述:
靜態(tài)隨機(jī)存取存儲(chǔ)器 512Kx36 1.8V DDR II 靜態(tài)隨機(jī)存取存儲(chǔ)器
- RoHS:
否
- 制造商:
Cypress Semiconductor
- 存儲(chǔ)容量:
16 Mbit
- 組織:
1 M x 16
- 訪問時(shí)間:
55 ns
- 電源電壓-最大:
3.6 V
- 電源電壓-最小:
2.2 V
- 最大工作電流:
22 uA
- 最大工作溫度:
+ 85 C
- 最小工作溫度:
- 40 C
- 安裝風(fēng)格:
SMD/SMT
- 封裝/箱體:
TSOP-48
- 封裝:
Tray
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
Cypress |
165-FBGA |
5800 |
Cypress一級(jí)分銷,原裝原盒原包裝! |
詢價(jià) | |||
Cypress |
24+ |
BGA165 |
85 |
詢價(jià) | |||
CYPRESS |
2016+ |
BGA |
6528 |
只做進(jìn)口原裝現(xiàn)貨!假一賠十! |
詢價(jià) | ||
CYPRESS |
17+ |
FBGA-165 |
6200 |
100%原裝正品現(xiàn)貨 |
詢價(jià) | ||
CYPRESS |
23+ |
BGA165 |
8560 |
受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣! |
詢價(jià) | ||
CYPRESS |
22+23+ |
165FBGA |
23249 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
Cypress |
23+ |
165-FBGA |
65600 |
詢價(jià) | |||
CY |
20+ |
功分器 |
67 |
全新現(xiàn)貨熱賣中歡迎查詢 |
詢價(jià) | ||
CYPRESS |
20+ |
165FBGA |
11520 |
特價(jià)全新原裝公司現(xiàn)貨 |
詢價(jià) | ||
Cypress Semiconductor Corp |
21+ |
48-VFBGA |
5280 |
進(jìn)口原裝!長(zhǎng)期供應(yīng)!絕對(duì)優(yōu)勢(shì)價(jià)格(誠(chéng)信經(jīng)營(yíng) |
詢價(jià) |
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