EDI2CG472256V12D2中文資料WEDC數(shù)據(jù)手冊(cè)PDF規(guī)格書

DESCRIPTION

The EDI2CG472256VxxD2 is a Synchronous/Synchronous Burst SRAM, 84 position Dual Key; Double High DIMM (168 contacts) Module, organized as 4x256Kx72. The Module contains sixteen (16) Synchronous Burst Ram Devices, packaged in the industry standard JEDEC 14mmx20mm TQFP placed on a Multilayer FR4 Substrate. The module architecture is defined as a Sync/Sync Burst, FlowThrough, with support for either linear or sequential burst. This module provides High Performance, 2-1-1-1 accesses when used in Burst Mode, and used as a Synchronous Only Mode, provides a high performance cost advantage over BiCMOS aysnchronous device architectures.

FEATURES

■ 4x256Kx72 Synchronous, Synchronous Burst

■ Flow-Through Architecture

■ Linear and Sequential Burst Support via MODE pin

■ Clock Controlled Registered Module Enable (EM#)

■ Clock Controlled Registered Bank Enables (E1#, E2#, E3#, E4#)

■ Clock Controlled Byte Write Mode Enable (BWE#)

■ Clock Controlled Byte Write Enables (BW1# - BW8#)

■ Clock Controlled Registered Address

■ Clock Controlled Registered Global Write (GW#)

■ Aysnchronous Output Enable (G#)

■ Internally Self-timed Write

■ Individual Bank Sleep Mode enables (ZZ1, ZZ2, ZZ3, ZZ4)

■ Gold Lead Finish

■ 3.3V +10, - 5 Operation

■ Access Speed(s): TKHQV=9, 10, 12, 15ns

■ Common Data I/O

■ High Capacitance (30pf) drive, at rated Access Speed

■ Single Total Array Clock

■ Multiple Vcc and Gnd