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ISPLSI1032-80LJ中文資料萊迪思數(shù)據(jù)手冊(cè)PDF規(guī)格書
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ISPLSI1032-80LJ規(guī)格書詳情
Description
The ispLSI and pLSI 1032 are High-Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 1032 features 5-Volt insystem programming and in-system diagnostic capabilities. It is the first device which offers non-volatile on-the-fly reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems. It is architecturally and parametrically compatible to the pLSI 1032 device, but multiplexes four of the dedicated input pins to control in-system programming.
Features
? HIGH-DENSITY PROGRAMMABLE LOGIC
— High Speed Global Interconnect
— 6000 PLD Gates
— 64 I/O Pins, Eight Dedicated Inputs
— 192 Registers
— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
— Small Logic Block Size for Fast Random Logic
— Security Cell Prevents Unauthorized Copying
? HIGH PERFORMANCE E2CMOS? TECHNOLOGY
— fmax = 90 MHz Maximum Operating Frequency
— fmax = 60 MHz for Industrial and Military/883 Devices
— tpd = 12 ns Propagation Delay
— TTL Compatible Inputs and Outputs
— Electrically Erasable and Reprogrammable
— Non-Volatile E2CMOS Technology
— 100 Tested
? ispLSI OFFERS THE FOLLOWING ADDED FEATURES
— In-System Programmable? (ISP?) 5-Volt Only
— Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
? COMBINES EASE OF USE AND THE FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
— Complete Programmable Device Can Combine Glue Logic and Structured Designs
— Four Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global Interconnectivity
? ispLSI AND pLSI DEVELOPMENT TOOLS
pDS? Software
— Easy to Use PC Windows? Interface
— Boolean Logic Compiler
— Manual Partitioning
— Automatic Place and Route
— Static Timing Table
ispDS+? Software
— Industry Standard, Third Party Design Environments
— Schematic Capture, State Machine, HDL
— Automatic Partitioning and Place and Route
— Comprehensive Logic and Timing Simulation
— PC and Workstation Platforms
產(chǎn)品屬性
- 型號(hào):
ISPLSI1032-80LJ
- 制造商:
Lattice Semiconductor Corporation
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
Lattice(萊迪斯) |
23+ |
標(biāo)準(zhǔn)封裝 |
187048 |
原廠渠道供應(yīng),大量現(xiàn)貨,原型號(hào)開票。 |
詢價(jià) | ||
LATTE/萊迪斯 |
23+ |
NA/ |
15 |
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價(jià) | ||
LATTICE |
2020+ |
PLCC-84 |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
Lattice |
24+ |
PLCC84 |
13500 |
免費(fèi)送樣原盒原包現(xiàn)貨一手渠道聯(lián)系 |
詢價(jià) | ||
LAttice |
22+23+ |
PLCC |
18166 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
Lattice |
97 |
24 |
公司優(yōu)勢(shì)庫存 熱賣中!! |
詢價(jià) | |||
LATTICE/萊迪斯 |
2402+ |
PLCC84 |
8324 |
原裝正品!實(shí)單價(jià)優(yōu)! |
詢價(jià) | ||
Lattice |
17+ |
6200 |
100%原裝正品現(xiàn)貨 |
詢價(jià) | |||
LATTICE |
23+ |
PLCC84 |
5000 |
原裝正品,假一罰十 |
詢價(jià) | ||
24+ |
PLCC |
48 |
詢價(jià) |