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M2V28S40ATP-6L中文資料三菱電機(jī)數(shù)據(jù)手冊(cè)PDF規(guī)格書
M2V28S40ATP-6L規(guī)格書詳情
DESCRIPTION
M2V28S20ATP is organized as 4-bank x 8,388,608-word x 4-bit Synchronous DRAM with LVTTL interface and M2V28S30ATP is organized as 4-bank x 4,194,304-word x 8-bit and M2V28S40ATP is organized as 4-bank x 2,097,152-word x 16-bit. All inputs and outputs are referenced to the rising edge of CLK.
M2V28S20ATP,M2V28S30ATP,M2V28S40ATP achieves very high speed data rates up to 133MHz, and is suitable for main memory or graphic memory in computer systems.
FEATURES
- Single 3.3V ±0.3V power supply
- Max. Clock frequency -6:PC133 / -7:PC100 / -8:PC100
- Fully synchronous operation referenced to clock rising edge
- 4-bank operation controlled by BA0,BA1(Bank Address)
- /CAS latency- 2/3 (programmable)
- Burst length- 1/2/4/8/FP (programmable)
- Burst type- Sequential and interleave burst (programmable)
- Byte Control- DQML and DQMU (M2V28S40ATP)
- Random column access
- Auto precharge / All bank precharge controlled by A10
- Auto and self refresh
- 4096 refresh cycles /64ms
- LVTTL Interface
- Package
M2V28S20ATP/30ATP/40ATP 400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch
產(chǎn)品屬性
- 型號(hào):
M2V28S40ATP-6L
- 制造商:
MITSUBISHI
- 制造商全稱:
Mitsubishi Electric Semiconductor
- 功能描述:
128M Synchronous DRAM
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
MIT |
24+ |
SOP54L |
5235 |
原裝現(xiàn)貨假一罰十 |
詢價(jià) | ||
MIT |
24+ |
SOP54L |
654 |
詢價(jià) | |||
MIT |
2402+ |
TSOP |
8324 |
原裝正品!實(shí)單價(jià)優(yōu)! |
詢價(jià) | ||
BGA |
335 |
詢價(jià) | |||||
Mitsubishi |
23+ |
BGA |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
MIT |
23+ |
SOP54L |
7795 |
一級(jí)代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、 |
詢價(jià) | ||
三凌 |
23+ |
TSOP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
MITSUBIS |
22+23+ |
TSOP |
37325 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
三凌 |
23+ |
NA/ |
302 |
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價(jià) | ||
MITSUBISHI |
05+ |
原廠原裝 |
4334 |
只做全新原裝真實(shí)現(xiàn)貨供應(yīng) |
詢價(jià) |