首頁>MT4LC4M4E9TG>規(guī)格書詳情
MT4LC4M4E9TG中文資料鎂光數(shù)據(jù)手冊(cè)PDF規(guī)格書
MT4LC4M4E9TG規(guī)格書詳情
GENERAL DESCRIPTION
The 4 Meg x 4 DRAM is a randomly accessed, solid-state memory containing 16,777,216 bits organized in a x4 configuration. RAS# is used to latch the row address (first 11 bits for 2K and first 12 bits for 4K). Once the page has been opened by RAS#, CAS# is used to latch the column address (the latter 11 bits for 2K and the latter 10 bits for 4K, address pins A10 and A11 are “don’t care”). READ and WRITE cycles are selected with the WE# input.
FEATURES
? Industry-standard x4 pinout, timing, functions and packages
? State-of-the-art, high-performance, low-power CMOS silicon-gate process
? Single power supply (+3.3V ±0.3V or +5V ±10)
? All inputs, outputs and clocks are TTL-compatible
? Refresh modes: RAS#-ONLY, HIDDEN and CAS#-BEFORE-RAS# (CBR)
? Optional Self Refresh (S) for low-power data retention
? 11 row, 11 column addresses (2K refresh) or 12 row, 10 column addresses (4K refresh)
? Extended Data-Out (EDO) PAGE MODE access cycle
? 5V-tolerant inputs and I/Os on 3.3V devices
產(chǎn)品屬性
- 型號(hào)：
MT4LC4M4E9TG
- 制造商：
MICRON
- 制造商全稱：
Micron Technology
- 功能描述：
4 MEG x 4 EDO DRAM
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
24+ |
5000 |
公司存貨 |
詢價(jià) | ||||
MICRON/鎂光 |
23+ |
NA |
1630 |
原裝正品代理渠道價(jià)格優(yōu)勢(shì) |
詢價(jià) | ||
MICRON |
15+ |
NA |
1630 |
全新進(jìn)口原裝 |
詢價(jià) | ||
MT |
2023+ |
TSOP |
80000 |
一級(jí)代理/分銷渠道價(jià)格優(yōu)勢(shì) 十年芯程一路只做原裝正品 |
詢價(jià) | ||
MT |
23+ |
TSOP |
20000 |
原廠原裝正品現(xiàn)貨 |
詢價(jià) | ||
17+ |
6200 |
100%原裝正品現(xiàn)貨 |
詢價(jià) | ||||
MICRON/美光 |
23+ |
TSOP |
12400 |
一級(jí)代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、 |
詢價(jià) | ||
AN |
2016+ |
原廠封裝 |
6528 |
只做原廠原裝現(xiàn)貨!終端客戶個(gè)別型號(hào)可以免費(fèi)送樣品! |
詢價(jià) | ||
MICROM |
23+ |
NA |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
MICROM |
22+23+ |
NA |
17298 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) |
