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PLL102-04SCL-R中文資料PLL數(shù)據(jù)手冊PDF規(guī)格書

PLL102-04SCL-R
廠商型號

PLL102-04SCL-R

功能描述

Low Skew Output Buffer

文件大小

236.44 Kbytes

頁面數(shù)量

6

生產(chǎn)廠商 PhaseLink Corporation
企業(yè)簡稱

PLL

中文名稱

PhaseLink Corporation官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二

更新時間

2025-1-30 11:20:00

PLL102-04SCL-R規(guī)格書詳情

DESCRIPTION

The PLL102-04 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOIC package. It has four outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than ±350 ps, the device acts as a zero delay buffer.

FEATURES

? Frequency range 50 ~ 120MHz.

? Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to the outputs (up to 100kHz SST modulation).

? Zero input - output delay.

? Less than 700 ps device - device skew.

? Less than 250 ps skew between outputs.

? Less than 200 ps cycle - cycle jitter.

? Output Enable function tri-state outputs.

? 3.3V operation.

? Available in 8-Pin 150mil SOIC.

產(chǎn)品屬性

  • 型號:

    PLL102-04SCL-R

  • 制造商:

    PLL

  • 制造商全稱:

    PLL

  • 功能描述:

    Low Skew Output Buffer

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
只做原裝
24+
SOP-8
36520
一級代理/放心采購
詢價
Phaseli
2020+
*
8000
只做自己庫存,全新原裝進口正品假一賠百,可開13%增
詢價
PHASELINK
23+
SOP
18509
一級代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、
詢價
PHASELINK
1923+
SOP-8
10000
只做原裝特價
詢價
PHASELI
2021+
SOIC8
100500
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨
詢價
Phaselink
23+
SOIC8
12800
##公司主營品牌長期供應(yīng)100%原裝現(xiàn)貨可含稅提供技術(shù)
詢價
PHASELINK
23+
*
50000
全新原裝正品現(xiàn)貨,支持訂貨
詢價
Phaselink
*
39000
集團化配單-有更多數(shù)量-免費送樣-原包裝正品現(xiàn)貨-正規(guī)
詢價
PHASELINK
22+
原廠原封
5000
全新原裝現(xiàn)貨!自家?guī)齑?
詢價
Phaselink
589220
16余年資質(zhì) 絕對原盒原盤 更多數(shù)量
詢價