TC55B4256J中文資料東芝數(shù)據(jù)手冊PDF規(guī)格書

Description

The TC55B4256J is a 1,048,576 bit high speed BICMOS static random access memory organized as 262,144 words by 4 bits

and operated from a single 5V supply. Toshiba's BICMOS technology and advanced circuit design enable high speed operation.

The TC55B4266J features low power dissipation when the device is deselected using chip enable (CE).

The TC55B4256J is suitable for use in applications where high speed is required such as cache memory, high speed storage, and

main memory. All inputs and outputs are TTL compatible.

The TC55B4256J is available in a 400mil width, 28-pin SOJ suitable for high density surface assembly.

Features

Fast access time

- TC55B4256J-12

- TC55B4256J-15

- TC55B4256J-20

? Low power dissipation

- Operation:

TC55B4256J-12

-

TC55B4256J-15

- TC5584256J-20

- Standby:

12ns (max.)

15ns (max.)

20ns (max.)

130mA (max.)

130mA (max.)

130mA (max.)

12mA (max.)

Single 5V power supply: 5V±10

? Fully static operation

Inputs and outputs TTL compatible

? Package:

TC55B4256J : SOJ28-P-400