VG3617801CT中文資料VML數(shù)據(jù)手冊PDF規(guī)格書

Description

The VG3617801CT is CMOS Synchronous Dynamic RAMs organized as 1,048,576-word X 8-bit X 2-bank. It is fabricated with an advanced submicron CMOS technology and is designed to operate from a single 3.3V power supply. This is packaged using JEDEC standard pinouts and standard plastic TSOP.

Features

? Single 3.3V(±0.3V) power supply

? Clock Frequency:100MHz

? Fully synchronous with all signals referenced to a positive clock edge

? Programmable CAS Iatency (2,3)

? Programmable burst length (1,2,4,8,& Full page)

? Programmable wrap sequence (Sequential/Interleave)

? Automatic precharge and controlled precharge

? Auto refresh and self refresh modes

? Dual Internal banks controlled by A11(Bank select)

? Simultaneous and independent two bank operation

? I/O level : LVTTL interface

? Random column access in every cycle

? X8 organization

? Input/output control by DQM

? 2048 refresh cycles/32ms

? Burst termination by burst stop and precharge command

? Burst read single write option