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CY7C1320KV18-250BZXC集成電路(IC)的存儲(chǔ)器規(guī)格書(shū)PDF中文資料
廠商型號(hào) |
CY7C1320KV18-250BZXC |
參數(shù)屬性 | CY7C1320KV18-250BZXC 封裝/外殼為165-LBGA;包裝為卷帶(TR);類別為集成電路(IC)的存儲(chǔ)器;產(chǎn)品描述:IC SRAM 18MBIT PARALLEL 165FBGA |
功能描述 | 18-Mbit DDR II SRAM Two-Word Burst Architecture |
文件大小 |
1.0195 Mbytes |
頁(yè)面數(shù)量 |
32 頁(yè) |
生產(chǎn)廠商 | CypressSemiconductor |
企業(yè)簡(jiǎn)稱 |
Cypress【賽普拉斯】 |
中文名稱 | 賽普拉斯半導(dǎo)體公司官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-3 11:22:00 |
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CY7C1320KV18-250BZXC規(guī)格書(shū)詳情
Functional Description
The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter.
Features
■ 18-Mbit density (2 M × 8, 2 M × 9, 1 M × 18, 512 K × 36)
■ 333-MHz clock for high bandwidth
■ Two-word burst for reducing address bus frequency
■ Double data rate (DDR) interfaces (data transferred at 666 MHz) at 333 MHz
■ Two input clocks (K and K) for precise DDR timing
? SRAM uses rising edges only
■ Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches
■ Echo clocks (CQ and CQ) simplify data capture in high-speed systems
■ Synchronous internally self-timed writes
■ DDR II operates with 1.5 cycle read latency when DOFF is asserted HIGH
■ Operates similar to DDR-I device with 1 cycle read latency when DOFF is asserted LOW
■ 1.8 V core power supply with HSTL inputs and outputs
■ Variable drive HSTL output buffers
■ Expanded HSTL output voltage (1.4 V–VDD)
? Supports both 1.5 V and 1.8 V I/O supply
■ Available in 165-ball FBGA package (13 × 15 × 1.4 mm)
■ Offered in both Pb-free and non Pb-free packages
■ JTAG 1149.1 compatible test access port
■ Phase locked loop (PLL) for accurate data placement
產(chǎn)品屬性
- 產(chǎn)品編號(hào):
CY7C1320KV18-250BZXC
- 制造商:
Cypress Semiconductor Corp
- 類別:
集成電路(IC) > 存儲(chǔ)器
- 包裝:
卷帶(TR)
- 存儲(chǔ)器類型:
易失
- 存儲(chǔ)器格式:
SRAM
- 技術(shù):
SRAM - 同步,DDR II
- 存儲(chǔ)容量:
18Mb(512K x 36)
- 存儲(chǔ)器接口:
并聯(lián)
- 電壓 - 供電:
1.7V ~ 1.9V
- 工作溫度:
0°C ~ 70°C(TA)
- 安裝類型:
表面貼裝型
- 封裝/外殼:
165-LBGA
- 供應(yīng)商器件封裝:
165-FBGA(13x15)
- 描述:
IC SRAM 18MBIT PARALLEL 165FBGA
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
CYPRESS/賽普拉斯 |
23+24 |
BGA |
98615 |
原裝現(xiàn)貨提供BOM一站式配單服務(wù) |
詢價(jià) | ||
CYPRESS |
23+ |
BGA-165 |
8560 |
受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣(mài)! |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
22+ |
N/A |
12245 |
現(xiàn)貨,原廠原裝假一罰十! |
詢價(jià) | ||
Cypress Semiconductor Corp |
23+ |
165-FBGA13x15 |
7300 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
24+ |
BGA |
36 |
原廠授權(quán)代理 價(jià)格絕對(duì)優(yōu)勢(shì) |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
22+ |
BGA |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
22+ |
BGA |
20000 |
原裝現(xiàn)貨,實(shí)單支持 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
23+ |
NA |
10000 |
原廠授權(quán)一級(jí)代理,專業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢價(jià) | ||
INFINEON/英飛凌 |
23+ |
PG-BGA-165 |
28611 |
為終端用戶提供優(yōu)質(zhì)元器件 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
23+ |
BGA |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) |