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CY7C1463AV33

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33

36-Mbit (1 M x 36/2 M x 18/512 k x 72) Flow-Through SRAM with NoBL Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100AXC

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100AXI

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100BZC

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100BZI

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100BZXC

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100BZXI

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-133AXC

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-133AXI

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-133BZC

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-133BZI

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-133BZXC

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-133BZXI

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

FunctionalDescription[1] TheCY7C1461AV33/CY7C1463AV33/CY7C1465AV33isa3.3V,1Mx36/2Mx18/512Kx72SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates. TheCY7C1461AV33/CY7C1463AV33/CY

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100AXC

36 Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100AXC

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100AXI

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100AXI

36 Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1463AV33-100BZC

36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

詳細(xì)參數(shù)

  • 型號:

    CY7C1463AV33

  • 功能描述:

    靜態(tài)隨機(jī)存取存儲器 2Mx18 3.3V NoBL FT 靜態(tài)隨機(jī)存取存儲器 COM

  • RoHS:

  • 制造商:

    Cypress Semiconductor

  • 存儲容量:

    16 Mbit

  • 組織:

    1 M x 16

  • 訪問時間:

    55 ns

  • 電源電壓-最大:

    3.6 V

  • 電源電壓-最?。?/span>

    2.2 V

  • 最大工作電流:

    22 uA

  • 最大工作溫度:

    + 85 C

  • 最小工作溫度:

    - 40 C

  • 安裝風(fēng)格:

    SMD/SMT

  • 封裝/箱體:

    TSOP-48

  • 封裝:

    Tray

供應(yīng)商型號品牌批號封裝庫存備注價格
CYPRESS
2016+
QFP
6528
只做進(jìn)口原裝現(xiàn)貨!或者訂貨,假一賠十!
詢價
CYP
2339+
N/A
5650
公司原廠原裝現(xiàn)貨假一罰十!特價出售!強(qiáng)勢庫存!
詢價
Cypress
23+
100-TQFP(14x20)
73390
專業(yè)分銷產(chǎn)品!原裝正品!價格優(yōu)勢!
詢價
Cypress
23+
100-TQFP
65600
詢價
Cypress Semiconductor Corp
24+
100-TQFP(14x20)
56200
一級代理/放心采購
詢價
CYPRESS
20+
QFP-100
1001
就找我吧!--邀您體驗愉快問購元件!
詢價
Cypress Semiconductor Corp
21+
NA
11200
正品專賣,進(jìn)口原裝深圳現(xiàn)貨
詢價
CYPRESS
2138+
原廠標(biāo)準(zhǔn)封裝
8960
代理CYPRESS全系列芯片,原裝現(xiàn)貨
詢價
Cypress
22+
100TQFP (14x20)
9000
原廠渠道,現(xiàn)貨配單
詢價
Cypress
21+
100TQFP (14x20)
13880
公司只售原裝,支持實單
詢價
更多CY7C1463AV33供應(yīng)商 更新時間2025-1-5 15:15:00