首頁(yè)>HY57V651620BLTC-8>規(guī)格書(shū)詳情
HY57V651620BLTC-8中文資料海力士數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
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HY57V651620BLTC-8規(guī)格書(shū)詳情
DESCRIPTION
The Hynix HY57V641620HG is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V641620HG is organized as 4banks of 1,048,576 x 16.
FEATURES
? Single 3.3±0.3V power supplyNote)
? All device pins are compatible with LVTTL interface
? JEDEC standard 400mil 54 pin TSOP-II with 0.8mm of pin pitch
? All inputs and outputs referenced to positive edge of system clock
? Data mask function by UDQM or LDQM
? Internal four banks operation
? Auto refresh and self refresh
? 4096 refresh cycles/64ms
? Programmable Burst Length and Burst Type
-1, 2, 4, 8 or Full page for Sequential Burst
-1, 2, 4 or 8 for Interleave Burst
? Programmable CAS Latency; 2, 3 Clocks
產(chǎn)品屬性
- 型號(hào)：
HY57V651620BLTC-8
- 制造商：
HYNIX
- 制造商全稱(chēng)：
Hynix Semiconductor
- 功能描述：
4 Banks x 1M x 16Bit Synchronous DRAM
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
HYNIX |
23+ |
TSOP54 |
10000 |
原廠授權(quán)一級(jí)代理,專(zhuān)業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢(xún)價(jià) | ||
HYUNDAI |
23+ |
TSSOP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢(xún)價(jià) | ||
HYUNDAI |
24+ |
TSOP |
30 |
詢(xún)價(jià) | |||
HYNIX |
2023+ |
TSOP |
50000 |
原裝現(xiàn)貨 |
詢(xún)價(jià) | ||
HY |
21+ |
TSSOP |
12588 |
原裝正品,自己庫(kù)存 假一罰十 |
詢(xún)價(jià) | ||
HYNIXSEMICON |
23+ |
65480 |
詢(xún)價(jià) | ||||
HY |
23+24 |
TSOP |
29650 |
原裝正品優(yōu)勢(shì)渠道價(jià)格合理.可開(kāi)13%增值稅發(fā)票 |
詢(xún)價(jià) | ||
HYNIX |
22+ |
TSOP |
5000 |
全新原裝現(xiàn)貨!自家?guī)齑? |
詢(xún)價(jià) | ||
HYNIX |
22+ |
SSOP |
8000 |
原裝正品支持實(shí)單 |
詢(xún)價(jià) | ||
HYUNDAI |
21+ |
TSSOP |
10000 |
原裝現(xiàn)貨假一罰十 |
詢(xún)價(jià) |
