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74LS112

DUALJKNEGATIVEEDGE-TRIGGEREDFLIP-FLOP

TheSN54/74LS112AdualJKflip-flopfeaturesindividualJ,K,clock,andasynchronoussetandclearinputstoeachflip-flop.WhentheclockgoesHIGH,theinputsareenabledanddatawillbeaccepted.ThelogicleveloftheJandKinputsmaybeallowedtochangewhentheclockpulseisHIGHandthe

MotorolaMotorola, Inc

摩托羅拉加爾文制造公司

74LS112

DUALJ-KNEGATIVE-EDGE-TRIGGEREDFLIP-FLOPSWITHPRESETANDCLEAR

TITexas Instruments

德州儀器美國德州儀器公司

74LS112

DualJ-KNegative-edge-triggeredFlip-Flops(withPresetandClear)

●Quadrupie2-InputPositiveNANDGates ●Quadruple2-InputPositiveNANDGates(withOpenCollectorOutput) (Continue....)

HitachiHitachi Semiconductor

日立日立公司

74LS112

DualNegative-Edge-TriggeredMaster-SlaveJ-KFlip-FlopwithPreset,Clear,andComplementaryOutputs

GeneralDescription Thisdevicecontainstwoindependentnegative-edge-triggeredJ-Kflip-flopswithcomplementaryoutputs.TheJandKdataisprocessedbytheflip-floponthefallingedgeoftheclockpulse.Theclocktriggeringoccursatavoltagelevelandisnotdirectlyrelatedtothetra

FairchildFairchild Semiconductor

仙童半導體飛兆/仙童半導體公司

74LS112A

DUALJKNEGATIVEEDGE-TRIGGEREDFLIP-FLOP

MotorolaMotorola, Inc

摩托羅拉加爾文制造公司

74LS112A

DualNegative-Edge-TriggeredMaster-SlaveJ-KFlip-FlopwithPreset,Clear,andComplementaryOutputs

GeneralDescription Thisdevicecontainstwoindependentnegative-edge-triggeredJ-Kflip-flopswithcomplementaryoutputs.TheJandKdataisprocessedbytheflip-floponthefallingedgeoftheclockpulse.Theclocktriggeringoccursatavoltagelevelandisnotdirectlyrelatedtothetra

FairchildFairchild Semiconductor

仙童半導體飛兆/仙童半導體公司

DM74LS112A

DualNegative-Edge-TriggeredMaster-SlaveJ-KFlip-FlopwithPreset,Clear,andComplementaryOutputs

GeneralDescription Thisdevicecontainstwoindependentnegative-edge-triggeredJ-Kflip-flopswithcomplementaryoutputs.TheJandKdataisprocessedbytheflip-floponthefallingedgeoftheclockpulse.Theclocktriggeringoccursatavoltagelevelandisnotdirectlyrelatedtothetra

FairchildFairchild Semiconductor

仙童半導體飛兆/仙童半導體公司

DM74LS112A

DUALNEGATIVE-EDGE-TRIGEREDMASTER-SLAVEJ-KFLIP-FLOPSWITHPRESET,CLEAR,ANDCOMPLEMENTARYOUTPUTS

NSCNational Semiconductor (TI)

美國國家半導體美國國家半導體公司

DM74LS112AM

DUALNEGATIVE-EDGE-TRIGEREDMASTER-SLAVEJ-KFLIP-FLOPSWITHPRESET,CLEAR,ANDCOMPLEMENTARYOUTPUTS

NSCNational Semiconductor (TI)

美國國家半導體美國國家半導體公司

DM74LS112AN

DUALNEGATIVE-EDGE-TRIGEREDMASTER-SLAVEJ-KFLIP-FLOPSWITHPRESET,CLEAR,ANDCOMPLEMENTARYOUTPUTS

NSCNational Semiconductor (TI)

美國國家半導體美國國家半導體公司

DM74LS112AN

DualNegative-Edge-TriggeredMaster-SlaveJ-KFlip-FlopwithPreset,Clear,andComplementaryOutputs

GeneralDescription Thisdevicecontainstwoindependentnegative-edge-triggeredJ-Kflip-flopswithcomplementaryoutputs.TheJandKdataisprocessedbytheflip-floponthefallingedgeoftheclockpulse.Theclocktriggeringoccursatavoltagelevelandisnotdirectlyrelatedtothetra

FairchildFairchild Semiconductor

仙童半導體飛兆/仙童半導體公司

HD74LS112

DualJ-KNegative-edge-triggeredFlip-Flops(withPresetandClear)

●Quadrupie2-InputPositiveNANDGates ●Quadruple2-InputPositiveNANDGates(withOpenCollectorOutput) (Continue....)

HitachiHitachi Semiconductor

日立日立公司

HD74LS112

Ouadruple2-inputPositiveNANDGates

HitachiHitachi Semiconductor

日立日立公司

HD74LS112

DualJ-KNegative-edge-triggeredFlip-Flops(withPresetandClear)

Features ?OrderingInformation

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LS112FPEL

DualJ-KNegative-edge-triggeredFlip-Flops(withPresetandClear)

Features ?OrderingInformation

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LS112P

DualJ-KNegative-edge-triggeredFlip-Flops(withPresetandClear)

Features ?OrderingInformation

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LS112RPEL

DualJ-KNegative-edge-triggeredFlip-Flops(withPresetandClear)

Features ?OrderingInformation

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

SN74LS112

DUALJ-KNEGATIVE-EDGE-TRIGGEREDFLIP-FLOPSWITHPRESETANDCLEAR

TITexas Instruments

德州儀器美國德州儀器公司

SN74LS112A

DUALJ-KNEGATIVE-EDGE-TRIGGEREDFLIP-FLOPSWIITHPRESETANDCLEAR

TITexas Instruments

德州儀器美國德州儀器公司

SN74LS112A

DUALJ-KNEGATIVE-EDGETRIGGEREDFLIP-FLOPS

TI1Texas Instruments

德州儀器

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更多TCG74LS112A供應商 更新時間2024-12-21 16:06:00