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PLL102-10SC-R中文資料PLL數(shù)據(jù)手冊PDF規(guī)格書

廠商型號 |
PLL102-10SC-R |
功能描述 | Low Skew Output Buffer |
文件大小 |
180.37 Kbytes |
頁面數(shù)量 |
6 頁 |
生產(chǎn)廠商 | PhaseLink Corporation |
企業(yè)簡稱 |
PLL |
中文名稱 | PhaseLink Corporation官網(wǎng) |
原廠標(biāo)識 | ![]() |
數(shù)據(jù)手冊 | |
更新時間 | 2025-3-10 14:16:00 |
人工找貨 | PLL102-10SC-R價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
PLL102-10SC-R規(guī)格書詳情
DESCRIPTION
The PLL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOIC or MSOP package. It has two outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than ±350 ps, the device acts as a zero delay buffer.
FEATURES
? Frequency range 50 ~ 120MHz.
? Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to outputs.
? Zero input - output delay.
? Less than 700 ps device - device skew.
? Less than 250 ps skew between outputs.
? Less than 100 ps cycle - cycle jitter.
? 2.5V or 3.3V power supply operation.
? Available in 8-Pin SOIC or MSOP package.
產(chǎn)品屬性
- 型號:
PLL102-10SC-R
- 制造商:
PLL
- 制造商全稱:
PLL
- 功能描述:
Low Skew Output Buffer
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
PHASELI |
2020+ |
SSOP48 |
8000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價 | ||
KHATOD |
20+ |
光電元件 |
982 |
就找我吧!--邀您體驗(yàn)愉快問購元件! |
詢價 | ||
PHASELIN |
22+ |
SSOP48 |
5000 |
全新原裝現(xiàn)貨!自家?guī)齑? |
詢價 | ||
PHASELIN |
0350+ |
SSOP48 |
30 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
PHASELI |
23+ |
SSOP48 |
8560 |
受權(quán)代理!全新原裝現(xiàn)貨特價熱賣! |
詢價 | ||
PHASELINK |
23+ |
SSOP |
8890 |
價格優(yōu)勢/原裝現(xiàn)貨/客戶至上/歡迎廣大客戶來電查詢 |
詢價 | ||
PHASELIN |
2023+ |
SSOP48 |
8800 |
正品渠道現(xiàn)貨 終端可提供BOM表配單。 |
詢價 | ||
PHASELI |
2020+ |
SSOP48 |
30 |
百分百原裝正品 真實(shí)公司現(xiàn)貨庫存 本公司只做原裝 可 |
詢價 | ||
PHASELIN |
0350+ |
SSOP48 |
30 |
普通 |
詢價 | ||
PHASELIN |
23+ |
SSOP48 |
2530 |
原廠原裝正品 |
詢價 |